1. Field of the Invention
The present invention relates to a process for vertically etching a semiconductor material in fabrication of a semiconductor integrated circuit, and more particularly to a process of anisotropically etching a semiconductor material, capable of preventing contamination of the semiconductor material and thereby improving the yield of a semiconductor integrated circuit finally fabricated.
2. Description of the Prior Art
In accordance with well-known anisotropic etch processes, an electric field and a plasma gas are applied to a semiconductor material such as silicon or polysilicon containing silicon in a sealed chamber, thereby causing the semiconductor material to be vertically etched. The electric field serves to ionize the plasma gas. The ionized plasma gas reacts with atoms of the semiconductor material, thereby producing a volatile compound. This volatile compound is discharged out of the sealed chamber by a vacuum pump.
The plasma gas contains a polymerizing factor serving to produce a polymer by itself or by its reaction with a photoresist film formed over the semiconductor material. The polymer produced by the polymerizing factor is deposited on the upper surface and side walls of the photoresist film, and the side walls and etched surface of the semiconductor material, thereby preventing the semiconductor material from being horizontally etched. This is because the polymer deposited on the side walls of the semiconductor material is left upon the etching, by virtue of the ionized plasma gas.
However, the polymer deposited on the side walls of the semiconductor material still remains after completion of the etching. As a result, the remaining polymer serves as a contaminant. Furthermore, removal of such a polymer is hardly accomplished in case of a semiconductor integrated circuit, in particular having a very small electrode width and wiring width. Due to the remaining polymer, the yield of a semiconductor integrated circuit is decreased. Now, the above-mentioned problems encountered in the contentional anisotropic etch process will be described, in conjunction with FIGS. 1A to 1D.
FIGS. 1A to 1D are sectional views respectively illustrating sequential steps of the conventional anisotropic etch process.
In accordance with the process, first a polysilicon layer 2 is deposited over a lower layer 1 comprised of an oxide layer, as shown in FIG. 1A. On the polysilicon layer 2, a photoresist pattern 3 is formed. The formation of photoresist patter 3 is achieved by coating a photoresist film over the polysilicon layer 2, exposing the photoresist film to a light by using a mask, and then developing the light-exposed photoresist film.
Under a condition that the photoresist pattern 3 is used as a mask, the polysilicon layer 2 is subjected to etching by utilizing a plasma gas ionized by an electric field. The exposed portion of polysilicon layer 2 reacts with the ionized plasma gas, so that it may be etched, as shown in FIG. 1B. In the process of etching, a polymer 4 is deposited on the side walls of the etched polysilicon layer 2, the target surface of polysilicon layer 2 to be etched, and the upper surface and side walls of the photoresist pattern 3. This polymer 4 is produced by a polymerizing factor contained in the plasma gas or by a reaction of the polymerizing factor with atoms of the photoresist pattern 4.
The portion of polymer 4 deposited on the upper surface of photoresist pattern 3 and the target etched surface of polysilicon layer 2 is removed by the ionized plasma gas, as shown in FIG. 1C. As a result, the target etched surface of polysilicon layer 2 is exposed. However, the portion of polymer 4 deposited on the side walls of photoresist pattern 3 and the side walls of polysilicon layer 2 is hardly removed by the ionized plasma gas. This is because the ionized plasma gas has no vertical orientation characteristic.
Thereafter, the exposed target etched surface of polysilicon layer 2 is completely removed by the ionized plasma gas, thereby partially exposing the lower layer 1. At the side walls of the etched polysilicon layer 2, however, the polymer 4 is still left without being removed by the ionized plasma gas. The remaining polymer 4 is chemically changed at the subsequent steps involving a heat treatment and chemical treatment. This results in a variation in conduction characteristics of polysilicon and a variation in insulation characteristics of a second oxide film to be subsequently coated over the lower layer 1. Due to such variations, the yield of a semiconductor integrated circuit finally fabricated is decreased. At a higher integration degree, the yield of a semiconductor integrated circuit is abruptly decreased.